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0f152a55d3
This pass aims to infer alignment for instructions as a separate pass, to reduce redundant work done by InstCombine running multiple times. It runs late in the pipeline, just before the back-end passes where this information is most useful. Differential Revision: https://reviews.llvm.org/D158529
98 lines
3.8 KiB
LLVM
98 lines
3.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
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; RUN: opt -S < %s -passes=infer-alignment | FileCheck %s
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; ------------------------------------------------------------------------------
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; load/store of null
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; ------------------------------------------------------------------------------
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define void @load_null() {
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; CHECK-LABEL: define void @load_null() {
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; CHECK-NEXT: [[X_0:%.*]] = load atomic i32, ptr null unordered, align 4294967296
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; CHECK-NEXT: [[X_1:%.*]] = load atomic i32, ptr null monotonic, align 4294967296
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; CHECK-NEXT: [[X_2:%.*]] = load atomic i32, ptr null seq_cst, align 4294967296
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; CHECK-NEXT: ret void
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;
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%x.0 = load atomic i32, ptr null unordered, align 4
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%x.1 = load atomic i32, ptr null monotonic, align 4
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%x.2 = load atomic i32, ptr null seq_cst, align 4
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ret void
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}
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define void @store_null() {
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; CHECK-LABEL: define void @store_null() {
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; CHECK-NEXT: store atomic i32 0, ptr null unordered, align 4294967296
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; CHECK-NEXT: store atomic i32 0, ptr null monotonic, align 4294967296
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; CHECK-NEXT: store atomic i32 0, ptr null seq_cst, align 4294967296
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; CHECK-NEXT: ret void
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;
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store atomic i32 0, ptr null unordered, align 4
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store atomic i32 0, ptr null monotonic, align 4
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store atomic i32 0, ptr null seq_cst, align 4
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ret void
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}
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; ------------------------------------------------------------------------------
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; load/store of global
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; ------------------------------------------------------------------------------
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@c = global i64 42
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define void @load_nonnull() {
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; CHECK-LABEL: define void @load_nonnull() {
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; CHECK-NEXT: [[X_0:%.*]] = load atomic i32, ptr @c unordered, align 8
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; CHECK-NEXT: [[X_1:%.*]] = load atomic i32, ptr @c monotonic, align 8
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; CHECK-NEXT: [[X_2:%.*]] = load atomic i32, ptr @c seq_cst, align 8
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; CHECK-NEXT: ret void
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;
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%x.0 = load atomic i32, ptr @c unordered, align 4
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%x.1 = load atomic i32, ptr @c monotonic, align 4
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%x.2 = load atomic i32, ptr @c seq_cst, align 4
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ret void
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}
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define void @store_nonnull() {
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; CHECK-LABEL: define void @store_nonnull() {
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; CHECK-NEXT: store atomic i32 0, ptr @c unordered, align 8
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; CHECK-NEXT: store atomic i32 0, ptr @c monotonic, align 8
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; CHECK-NEXT: store atomic i32 0, ptr @c seq_cst, align 8
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; CHECK-NEXT: ret void
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;
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store atomic i32 0, ptr @c unordered, align 4
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store atomic i32 0, ptr @c monotonic, align 4
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store atomic i32 0, ptr @c seq_cst, align 4
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ret void
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}
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; ------------------------------------------------------------------------------
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; load/store of alloca
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; ------------------------------------------------------------------------------
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define void @load_alloca() {
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; CHECK-LABEL: define void @load_alloca() {
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; CHECK-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[X_0:%.*]] = load atomic i32, ptr [[ALLOCA]] unordered, align 4
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; CHECK-NEXT: [[X_1:%.*]] = load atomic i32, ptr [[ALLOCA]] monotonic, align 4
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; CHECK-NEXT: [[X_2:%.*]] = load atomic i32, ptr [[ALLOCA]] seq_cst, align 4
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; CHECK-NEXT: ret void
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;
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%alloca = alloca i32
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%x.0 = load atomic i32, ptr %alloca unordered, align 1
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%x.1 = load atomic i32, ptr %alloca monotonic, align 1
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%x.2 = load atomic i32, ptr %alloca seq_cst, align 1
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ret void
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}
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define void @store_alloca() {
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; CHECK-LABEL: define void @store_alloca() {
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; CHECK-NEXT: [[ALLOCA:%.*]] = alloca i32, align 4
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; CHECK-NEXT: store atomic i32 0, ptr [[ALLOCA]] unordered, align 4
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; CHECK-NEXT: store atomic i32 0, ptr [[ALLOCA]] monotonic, align 4
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; CHECK-NEXT: store atomic i32 0, ptr [[ALLOCA]] seq_cst, align 4
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; CHECK-NEXT: ret void
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;
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%alloca = alloca i32
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store atomic i32 0, ptr %alloca unordered, align 1
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store atomic i32 0, ptr %alloca monotonic, align 1
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store atomic i32 0, ptr %alloca seq_cst, align 1
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ret void
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}
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