Jeremy Morse ece761427f Revert "[DebugInfo][DAG] Distinguish different kinds of location indirection" ...

This reverts commit 3137fe4d23eeb8df08c03e9111465325eeafe08e.

I'm backing out D68945, which this patch is a follow up for. It'll be
re-landed when D68945 is fixed.

The changes to dbg-value-func-arg.ll occur because our handling of certain
kinds of location now mixes up indirection that happens at different points
in a DIExpression. While this is a regression, it's a return to the prior
behaviour while a better patch is sought.

2020-02-06 14:41:40 +00:00

..

CMakeLists.txt

[cmake] Explicitly mark libraries defined in lib/ as "Component Libraries"

2019-11-21 10:48:08 -08:00

DAGCombiner.cpp

visitINSERT_VECTOR_ELT - pull out repeated dyn_cast. NFCI.

2020-02-05 13:30:54 +00:00

FastISel.cpp

[FastISel] Lower llvm.dbg.value(undef, ... correctly.

2020-01-16 16:22:20 -08:00

FunctionLoweringInfo.cpp

DAG: Check if a value is divergent before requiresUniformRegister

2020-01-31 15:27:18 -08:00

InstrEmitter.cpp

Revert "[SafeStack][DebugInfo] Insert DW_OP_deref in correct location"

2020-02-06 14:41:39 +00:00

InstrEmitter.h

…

LegalizeDAG.cpp

[DAG] Add helper for creating constant vector index with correct type. NFC.

2020-01-18 01:23:36 -05:00

LegalizeFloatTypes.cpp

[LegalizeTypes][X86] Add a new strategy for type legalizing f16 type that softens it to i16, but promotes to f32 around arithmetic ops.

2020-02-01 11:21:04 -08:00

LegalizeIntegerTypes.cpp

[LegalizeTypes][X86] Add a new strategy for type legalizing f16 type that softens it to i16, but promotes to f32 around arithmetic ops.

2020-02-01 11:21:04 -08:00

LegalizeTypes.cpp

[LegalizeTypes][X86] Add a new strategy for type legalizing f16 type that softens it to i16, but promotes to f32 around arithmetic ops.

2020-02-01 11:21:04 -08:00

LegalizeTypes.h

[LegalizeTypes][X86] Add a new strategy for type legalizing f16 type that softens it to i16, but promotes to f32 around arithmetic ops.

2020-02-01 11:21:04 -08:00

LegalizeTypesGeneric.cpp

[LegalizeTypes][X86] Add a new strategy for type legalizing f16 type that softens it to i16, but promotes to f32 around arithmetic ops.

2020-02-01 11:21:04 -08:00

LegalizeVectorOps.cpp

[FPEnv] Divide macro INSTRUCTION into INSTRUCTION and DAG_INSTRUCTION,

2020-01-27 10:38:05 +08:00

LegalizeVectorTypes.cpp

[ARM][VecReduce] Force expand vector_reduce_fmin

2020-02-04 09:36:59 +00:00

LLVMBuild.txt

…

ResourcePriorityQueue.cpp

…

ScheduleDAGFast.cpp

Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC

2019-08-01 23:27:28 +00:00

ScheduleDAGRRList.cpp

[ScheduleDAG] When a node is cloned, add an edge between the nodes.

2019-10-04 19:51:40 +00:00

ScheduleDAGSDNodes.cpp

Revert "[PHIEliminate] Move dbg values after phi and label"

2020-01-16 14:01:27 +00:00

ScheduleDAGSDNodes.h

Prune Analysis includes from SelectionDAG.h

2019-10-19 01:07:48 +00:00

ScheduleDAGVLIW.cpp

Prune Analysis includes from SelectionDAG.h

2019-10-19 01:07:48 +00:00

SDNodeDbgValue.h

…

SelectionDAG.cpp

[Alignment][NFC] Use Align for getMemcpy/Memmove/Memset

2020-02-03 17:13:19 +01:00

SelectionDAGAddressAnalysis.cpp

Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each

2019-10-19 01:31:09 +00:00

SelectionDAGBuilder.cpp

Revert "[DebugInfo][DAG] Distinguish different kinds of location indirection"

2020-02-06 14:41:40 +00:00

SelectionDAGBuilder.h

[FPEnv] Fix chain handling regression after 04a8696

2020-01-14 14:10:57 +01:00

SelectionDAGDumper.cpp

Make llvm::StringRef to std::string conversions explicit.

2020-01-28 23:25:25 +01:00

SelectionDAGISel.cpp

[DAG] OptLevelChanger - fix uninitialized variable analyzer warning (PR44471)

2020-02-04 10:54:33 +00:00

SelectionDAGPrinter.cpp

Make llvm::StringRef to std::string conversions explicit.

2020-01-28 23:25:25 +01:00

SelectionDAGTargetInfo.cpp

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StatepointLowering.cpp

[SVE][CodeGen] Scalable vector MVT size queries

2019-11-18 12:30:59 +00:00

StatepointLowering.h

…

TargetLowering.cpp

[NFC] Encapsulate MemOp logic

2020-02-04 10:36:26 +01:00