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45a91c1521
Previously this would produce many invalid reductions with "Instruction does not dominate uses" verifier errors. This fixes issues in cases where the incoming IR has unreachable blocks, and the resulting reduction introduced new reachable blocks. Have basic-blocks skip functions that have unreachable blocks, Introduce a separate reduction which only deletes unreachable blocks. Cleanup any newly unreachable blocks after trimming out the requested deletions. Includes a variety of meta-reduced tests for llvm-reduce itself with -abort-on-invalid-reduction that were failing on different iterations of this patch. Bugpoint's implementation is much simpler (but currently I don't understand how it avoids disconnecting interesting blocks from the CFG).
48 lines
1.4 KiB
LLVM
48 lines
1.4 KiB
LLVM
; RUN: llvm-reduce --abort-on-invalid-reduction --delta-passes=basic-blocks --test FileCheck --test-arg --check-prefixes=CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t
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; RUN: FileCheck %s < %t
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; Make sure an invalid reduction isn't produced due to leaving behind
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; invalid code in %bb8 after it becomes unreachable.
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; CHECK-INTERESTINGNESS: store i32 0,
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; CHECK-INTERESTINGNESS: store i32 1,
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; CHECK-INTERESTINGNESS: store i32 2,
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; CHECK: bb:
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; CHECK-NEXT: store i32 0, ptr addrspace(3) null, align 4
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; CHECK: bb6: ; preds = %bb8, %bb
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; CHECK-NEXT: store i32 1, ptr addrspace(3) null, align 4
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; CHECK: bb8: ; preds = %bb6
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; CHECK-NEXT: %tmp = phi ptr addrspace(5) [ null, %bb6 ]
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define amdgpu_kernel void @foo(i32 %arg) {
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bb:
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store i32 0, ptr addrspace(3) null
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br label %bb6
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bb6: ; preds = %bb10, %bb9, %bb8, %bb
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store i32 1, ptr addrspace(3) null
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switch i32 0, label %bb7 [
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i32 0, label %bb8
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]
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bb7: ; preds = %bb6
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unreachable
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bb8: ; preds = %bb6
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%tmp = phi ptr addrspace(5) [ null, %bb6 ]
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store i32 2, ptr addrspace(5) %tmp
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switch i32 %arg, label %bb6 [
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i32 0, label %bb10
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i32 1, label %bb9
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]
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bb9: ; preds = %bb8
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br label %bb6
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bb10: ; preds = %bb8
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br label %bb6
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}
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