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Inferring super-register classes naively requires checking every register class against every other register class and sub-register index. Each of those checks is itself a non-trivial operation on register sets. Culling as many (RC, RC, SubIdx) triples as possible is important for the running time of TableGen for architectures with complex sub-register relations. Use transitivity to cull many (RC, RC, SubIdx) triples. This unfortunately requires us to complete the transitive closure of super-register classes explicitly, but it still cuts down the running time on AMDGPU substantially -- in some upcoming work in the backend by more than half (in very rough measurements). This changes the names of some of the inferred register classes, since the order in which they are inferred changes. The names of the inferred register classes become shorter, which reduces the size of the generated files. Replacing some uses of SmallPtrSet by DenseSet shaves off a few more percent; there are hundreds of register classes in AMDGPU. Tweaking the topological signature check to skip reigsters without super-registers further helps skip register classes that have "pseudo" registers in them whose sub- and super-register structure is trivial.