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eece6ba283
AMDGPU has native instructions and target intrinsics for this, but these really should be subject to legalization and generic optimizations. This will enable legalization of f16->f32 on targets without f16 support. Implement a somewhat horrible inline expansion for targets without libcall support. This could be better if we could introduce control flow (GlobalISel version not yet implemented). Support for strictfp legalization is less complete but works for the simple cases.
1094 lines
43 KiB
C++
1094 lines
43 KiB
C++
//===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This implements the SelectionDAG::dump method and friends.
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//
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//===----------------------------------------------------------------------===//
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#include "SDNodeDbgValue.h"
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#include "llvm/ADT/APFloat.h"
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#include "llvm/ADT/APInt.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/CodeGen/ISDOpcodes.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineConstantPool.h"
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#include "llvm/CodeGen/MachineMemOperand.h"
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#include "llvm/CodeGen/MachineValueType.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/CodeGen/SelectionDAGNodes.h"
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#include "llvm/CodeGen/TargetInstrInfo.h"
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#include "llvm/CodeGen/TargetLowering.h"
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#include "llvm/CodeGen/TargetRegisterInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/Config/llvm-config.h"
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#include "llvm/IR/BasicBlock.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/DebugInfoMetadata.h"
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#include "llvm/IR/DebugLoc.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Intrinsics.h"
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#include "llvm/IR/ModuleSlotTracker.h"
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#include "llvm/IR/Value.h"
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#include "llvm/Support/Casting.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/Printable.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetIntrinsicInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include <cstdint>
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#include <iterator>
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using namespace llvm;
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static cl::opt<bool>
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VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
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cl::desc("Display more information when dumping selection "
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"DAG nodes."));
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std::string SDNode::getOperationName(const SelectionDAG *G) const {
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switch (getOpcode()) {
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default:
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if (getOpcode() < ISD::BUILTIN_OP_END)
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return "<<Unknown DAG Node>>";
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if (isMachineOpcode()) {
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if (G)
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if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
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if (getMachineOpcode() < TII->getNumOpcodes())
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return std::string(TII->getName(getMachineOpcode()));
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return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
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}
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if (G) {
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const TargetLowering &TLI = G->getTargetLoweringInfo();
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const char *Name = TLI.getTargetNodeName(getOpcode());
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if (Name) return Name;
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return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
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}
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return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
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#ifndef NDEBUG
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case ISD::DELETED_NODE: return "<<Deleted Node!>>";
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#endif
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case ISD::PREFETCH: return "Prefetch";
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case ISD::MEMBARRIER: return "MemBarrier";
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case ISD::ATOMIC_FENCE: return "AtomicFence";
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case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
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case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
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case ISD::ATOMIC_SWAP: return "AtomicSwap";
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case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
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case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
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case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
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case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
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case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
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case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
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case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
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case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
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case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
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case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
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case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
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case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
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case ISD::ATOMIC_LOAD_UINC_WRAP:
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return "AtomicLoadUIncWrap";
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case ISD::ATOMIC_LOAD_UDEC_WRAP:
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return "AtomicLoadUDecWrap";
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case ISD::ATOMIC_LOAD: return "AtomicLoad";
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case ISD::ATOMIC_STORE: return "AtomicStore";
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case ISD::PCMARKER: return "PCMarker";
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case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
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case ISD::SRCVALUE: return "SrcValue";
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case ISD::MDNODE_SDNODE: return "MDNode";
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case ISD::EntryToken: return "EntryToken";
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case ISD::TokenFactor: return "TokenFactor";
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case ISD::AssertSext: return "AssertSext";
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case ISD::AssertZext: return "AssertZext";
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case ISD::AssertAlign: return "AssertAlign";
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case ISD::BasicBlock: return "BasicBlock";
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case ISD::VALUETYPE: return "ValueType";
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case ISD::Register: return "Register";
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case ISD::RegisterMask: return "RegisterMask";
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case ISD::Constant:
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if (cast<ConstantSDNode>(this)->isOpaque())
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return "OpaqueConstant";
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return "Constant";
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case ISD::ConstantFP: return "ConstantFP";
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case ISD::GlobalAddress: return "GlobalAddress";
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case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
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case ISD::FrameIndex: return "FrameIndex";
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case ISD::JumpTable: return "JumpTable";
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case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
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case ISD::RETURNADDR: return "RETURNADDR";
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case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
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case ISD::FRAMEADDR: return "FRAMEADDR";
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case ISD::SPONENTRY: return "SPONENTRY";
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case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
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case ISD::READ_REGISTER: return "READ_REGISTER";
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case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
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case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
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case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
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case ISD::EH_RETURN: return "EH_RETURN";
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case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
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case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
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case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
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case ISD::ConstantPool: return "ConstantPool";
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case ISD::TargetIndex: return "TargetIndex";
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case ISD::ExternalSymbol: return "ExternalSymbol";
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case ISD::BlockAddress: return "BlockAddress";
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case ISD::INTRINSIC_WO_CHAIN:
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case ISD::INTRINSIC_VOID:
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case ISD::INTRINSIC_W_CHAIN: {
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unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
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unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
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if (IID < Intrinsic::num_intrinsics)
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return Intrinsic::getBaseName((Intrinsic::ID)IID).str();
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if (!G)
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return "Unknown intrinsic";
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if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
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return TII->getName(IID);
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llvm_unreachable("Invalid intrinsic ID");
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}
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case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
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case ISD::TargetConstant:
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if (cast<ConstantSDNode>(this)->isOpaque())
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return "OpaqueTargetConstant";
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return "TargetConstant";
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case ISD::TargetConstantFP: return "TargetConstantFP";
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case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
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case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
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case ISD::TargetFrameIndex: return "TargetFrameIndex";
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case ISD::TargetJumpTable: return "TargetJumpTable";
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case ISD::TargetConstantPool: return "TargetConstantPool";
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case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
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case ISD::MCSymbol: return "MCSymbol";
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case ISD::TargetBlockAddress: return "TargetBlockAddress";
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case ISD::CopyToReg: return "CopyToReg";
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case ISD::CopyFromReg: return "CopyFromReg";
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case ISD::UNDEF: return "undef";
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case ISD::VSCALE: return "vscale";
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case ISD::MERGE_VALUES: return "merge_values";
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case ISD::INLINEASM: return "inlineasm";
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case ISD::INLINEASM_BR: return "inlineasm_br";
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case ISD::EH_LABEL: return "eh_label";
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case ISD::ANNOTATION_LABEL: return "annotation_label";
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case ISD::HANDLENODE: return "handlenode";
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// Unary operators
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case ISD::FABS: return "fabs";
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case ISD::FMINNUM: return "fminnum";
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case ISD::STRICT_FMINNUM: return "strict_fminnum";
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case ISD::FMAXNUM: return "fmaxnum";
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case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
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case ISD::FMINNUM_IEEE: return "fminnum_ieee";
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case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
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case ISD::FMINIMUM: return "fminimum";
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case ISD::STRICT_FMINIMUM: return "strict_fminimum";
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case ISD::FMAXIMUM: return "fmaximum";
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case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
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case ISD::FNEG: return "fneg";
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case ISD::FSQRT: return "fsqrt";
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case ISD::STRICT_FSQRT: return "strict_fsqrt";
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case ISD::FCBRT: return "fcbrt";
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case ISD::FSIN: return "fsin";
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case ISD::STRICT_FSIN: return "strict_fsin";
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case ISD::FCOS: return "fcos";
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case ISD::STRICT_FCOS: return "strict_fcos";
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case ISD::FSINCOS: return "fsincos";
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case ISD::FTRUNC: return "ftrunc";
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case ISD::STRICT_FTRUNC: return "strict_ftrunc";
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case ISD::FFLOOR: return "ffloor";
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case ISD::STRICT_FFLOOR: return "strict_ffloor";
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case ISD::FCEIL: return "fceil";
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case ISD::STRICT_FCEIL: return "strict_fceil";
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case ISD::FRINT: return "frint";
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case ISD::STRICT_FRINT: return "strict_frint";
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case ISD::FNEARBYINT: return "fnearbyint";
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case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
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case ISD::FROUND: return "fround";
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case ISD::STRICT_FROUND: return "strict_fround";
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case ISD::FROUNDEVEN: return "froundeven";
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case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
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case ISD::FEXP: return "fexp";
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case ISD::STRICT_FEXP: return "strict_fexp";
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case ISD::FEXP2: return "fexp2";
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case ISD::STRICT_FEXP2: return "strict_fexp2";
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case ISD::FLOG: return "flog";
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case ISD::STRICT_FLOG: return "strict_flog";
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case ISD::FLOG2: return "flog2";
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case ISD::STRICT_FLOG2: return "strict_flog2";
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case ISD::FLOG10: return "flog10";
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case ISD::STRICT_FLOG10: return "strict_flog10";
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// Binary operators
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case ISD::ADD: return "add";
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case ISD::SUB: return "sub";
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case ISD::MUL: return "mul";
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case ISD::MULHU: return "mulhu";
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case ISD::MULHS: return "mulhs";
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case ISD::AVGFLOORU: return "avgflooru";
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case ISD::AVGFLOORS: return "avgfloors";
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case ISD::AVGCEILU: return "avgceilu";
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case ISD::AVGCEILS: return "avgceils";
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case ISD::ABDS: return "abds";
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case ISD::ABDU: return "abdu";
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case ISD::SDIV: return "sdiv";
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case ISD::UDIV: return "udiv";
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case ISD::SREM: return "srem";
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case ISD::UREM: return "urem";
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case ISD::SMUL_LOHI: return "smul_lohi";
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case ISD::UMUL_LOHI: return "umul_lohi";
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case ISD::SDIVREM: return "sdivrem";
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case ISD::UDIVREM: return "udivrem";
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case ISD::AND: return "and";
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case ISD::OR: return "or";
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case ISD::XOR: return "xor";
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case ISD::SHL: return "shl";
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case ISD::SRA: return "sra";
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case ISD::SRL: return "srl";
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case ISD::ROTL: return "rotl";
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case ISD::ROTR: return "rotr";
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case ISD::FSHL: return "fshl";
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case ISD::FSHR: return "fshr";
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case ISD::FADD: return "fadd";
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case ISD::STRICT_FADD: return "strict_fadd";
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case ISD::FSUB: return "fsub";
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case ISD::STRICT_FSUB: return "strict_fsub";
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case ISD::FMUL: return "fmul";
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case ISD::STRICT_FMUL: return "strict_fmul";
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case ISD::FDIV: return "fdiv";
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case ISD::STRICT_FDIV: return "strict_fdiv";
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case ISD::FMA: return "fma";
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case ISD::STRICT_FMA: return "strict_fma";
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case ISD::FMAD: return "fmad";
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case ISD::FREM: return "frem";
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case ISD::STRICT_FREM: return "strict_frem";
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case ISD::FCOPYSIGN: return "fcopysign";
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case ISD::FGETSIGN: return "fgetsign";
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case ISD::FCANONICALIZE: return "fcanonicalize";
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case ISD::IS_FPCLASS: return "is_fpclass";
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case ISD::FPOW: return "fpow";
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case ISD::STRICT_FPOW: return "strict_fpow";
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case ISD::SMIN: return "smin";
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case ISD::SMAX: return "smax";
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case ISD::UMIN: return "umin";
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case ISD::UMAX: return "umax";
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case ISD::FLDEXP: return "fldexp";
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case ISD::STRICT_FLDEXP: return "strict_fldexp";
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case ISD::FPOWI: return "fpowi";
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case ISD::STRICT_FPOWI: return "strict_fpowi";
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case ISD::SETCC: return "setcc";
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case ISD::SETCCCARRY: return "setcccarry";
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case ISD::STRICT_FSETCC: return "strict_fsetcc";
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case ISD::STRICT_FSETCCS: return "strict_fsetccs";
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case ISD::SELECT: return "select";
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case ISD::VSELECT: return "vselect";
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case ISD::SELECT_CC: return "select_cc";
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case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
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case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
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case ISD::CONCAT_VECTORS: return "concat_vectors";
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case ISD::INSERT_SUBVECTOR: return "insert_subvector";
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case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
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case ISD::VECTOR_DEINTERLEAVE: return "vector_deinterleave";
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case ISD::VECTOR_INTERLEAVE: return "vector_interleave";
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case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
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case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
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case ISD::VECTOR_SPLICE: return "vector_splice";
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case ISD::SPLAT_VECTOR: return "splat_vector";
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case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
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case ISD::VECTOR_REVERSE: return "vector_reverse";
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case ISD::STEP_VECTOR: return "step_vector";
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case ISD::CARRY_FALSE: return "carry_false";
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case ISD::ADDC: return "addc";
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case ISD::ADDE: return "adde";
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case ISD::UADDO_CARRY: return "uaddo_carry";
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case ISD::SADDO_CARRY: return "saddo_carry";
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case ISD::SADDO: return "saddo";
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case ISD::UADDO: return "uaddo";
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case ISD::SSUBO: return "ssubo";
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case ISD::USUBO: return "usubo";
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case ISD::SMULO: return "smulo";
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case ISD::UMULO: return "umulo";
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case ISD::SUBC: return "subc";
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case ISD::SUBE: return "sube";
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case ISD::USUBO_CARRY: return "usubo_carry";
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case ISD::SSUBO_CARRY: return "ssubo_carry";
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case ISD::SHL_PARTS: return "shl_parts";
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case ISD::SRA_PARTS: return "sra_parts";
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case ISD::SRL_PARTS: return "srl_parts";
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case ISD::SADDSAT: return "saddsat";
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case ISD::UADDSAT: return "uaddsat";
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case ISD::SSUBSAT: return "ssubsat";
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case ISD::USUBSAT: return "usubsat";
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case ISD::SSHLSAT: return "sshlsat";
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case ISD::USHLSAT: return "ushlsat";
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case ISD::SMULFIX: return "smulfix";
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case ISD::SMULFIXSAT: return "smulfixsat";
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case ISD::UMULFIX: return "umulfix";
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case ISD::UMULFIXSAT: return "umulfixsat";
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case ISD::SDIVFIX: return "sdivfix";
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case ISD::SDIVFIXSAT: return "sdivfixsat";
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case ISD::UDIVFIX: return "udivfix";
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case ISD::UDIVFIXSAT: return "udivfixsat";
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// Conversion operators.
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case ISD::SIGN_EXTEND: return "sign_extend";
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case ISD::ZERO_EXTEND: return "zero_extend";
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case ISD::ANY_EXTEND: return "any_extend";
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case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
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case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
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case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
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case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
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case ISD::TRUNCATE: return "truncate";
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case ISD::FP_ROUND: return "fp_round";
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case ISD::STRICT_FP_ROUND: return "strict_fp_round";
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case ISD::FP_EXTEND: return "fp_extend";
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case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
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case ISD::SINT_TO_FP: return "sint_to_fp";
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case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
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case ISD::UINT_TO_FP: return "uint_to_fp";
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case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
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case ISD::FP_TO_SINT: return "fp_to_sint";
|
|
case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
|
|
case ISD::FP_TO_UINT: return "fp_to_uint";
|
|
case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
|
|
case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
|
|
case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
|
|
case ISD::BITCAST: return "bitcast";
|
|
case ISD::ADDRSPACECAST: return "addrspacecast";
|
|
case ISD::FP16_TO_FP: return "fp16_to_fp";
|
|
case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
|
|
case ISD::FP_TO_FP16: return "fp_to_fp16";
|
|
case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
|
|
case ISD::BF16_TO_FP: return "bf16_to_fp";
|
|
case ISD::FP_TO_BF16: return "fp_to_bf16";
|
|
case ISD::LROUND: return "lround";
|
|
case ISD::STRICT_LROUND: return "strict_lround";
|
|
case ISD::LLROUND: return "llround";
|
|
case ISD::STRICT_LLROUND: return "strict_llround";
|
|
case ISD::LRINT: return "lrint";
|
|
case ISD::STRICT_LRINT: return "strict_lrint";
|
|
case ISD::LLRINT: return "llrint";
|
|
case ISD::STRICT_LLRINT: return "strict_llrint";
|
|
|
|
// Control flow instructions
|
|
case ISD::BR: return "br";
|
|
case ISD::BRIND: return "brind";
|
|
case ISD::BR_JT: return "br_jt";
|
|
case ISD::BRCOND: return "brcond";
|
|
case ISD::BR_CC: return "br_cc";
|
|
case ISD::CALLSEQ_START: return "callseq_start";
|
|
case ISD::CALLSEQ_END: return "callseq_end";
|
|
|
|
// EH instructions
|
|
case ISD::CATCHRET: return "catchret";
|
|
case ISD::CLEANUPRET: return "cleanupret";
|
|
|
|
// Other operators
|
|
case ISD::LOAD: return "load";
|
|
case ISD::STORE: return "store";
|
|
case ISD::MLOAD: return "masked_load";
|
|
case ISD::MSTORE: return "masked_store";
|
|
case ISD::MGATHER: return "masked_gather";
|
|
case ISD::MSCATTER: return "masked_scatter";
|
|
case ISD::VAARG: return "vaarg";
|
|
case ISD::VACOPY: return "vacopy";
|
|
case ISD::VAEND: return "vaend";
|
|
case ISD::VASTART: return "vastart";
|
|
case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
|
|
case ISD::EXTRACT_ELEMENT: return "extract_element";
|
|
case ISD::BUILD_PAIR: return "build_pair";
|
|
case ISD::STACKSAVE: return "stacksave";
|
|
case ISD::STACKRESTORE: return "stackrestore";
|
|
case ISD::TRAP: return "trap";
|
|
case ISD::DEBUGTRAP: return "debugtrap";
|
|
case ISD::UBSANTRAP: return "ubsantrap";
|
|
case ISD::LIFETIME_START: return "lifetime.start";
|
|
case ISD::LIFETIME_END: return "lifetime.end";
|
|
case ISD::PSEUDO_PROBE:
|
|
return "pseudoprobe";
|
|
case ISD::GC_TRANSITION_START: return "gc_transition.start";
|
|
case ISD::GC_TRANSITION_END: return "gc_transition.end";
|
|
case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
|
|
case ISD::FREEZE: return "freeze";
|
|
case ISD::PREALLOCATED_SETUP:
|
|
return "call_setup";
|
|
case ISD::PREALLOCATED_ARG:
|
|
return "call_alloc";
|
|
|
|
// Floating point environment manipulation
|
|
case ISD::GET_ROUNDING: return "get_rounding";
|
|
case ISD::SET_ROUNDING: return "set_rounding";
|
|
case ISD::GET_FPENV: return "get_fpenv";
|
|
case ISD::SET_FPENV: return "set_fpenv";
|
|
case ISD::RESET_FPENV: return "reset_fpenv";
|
|
case ISD::GET_FPENV_MEM: return "get_fpenv_mem";
|
|
case ISD::SET_FPENV_MEM: return "set_fpenv_mem";
|
|
|
|
// Bit manipulation
|
|
case ISD::ABS: return "abs";
|
|
case ISD::BITREVERSE: return "bitreverse";
|
|
case ISD::BSWAP: return "bswap";
|
|
case ISD::CTPOP: return "ctpop";
|
|
case ISD::CTTZ: return "cttz";
|
|
case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
|
|
case ISD::CTLZ: return "ctlz";
|
|
case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
|
|
case ISD::PARITY: return "parity";
|
|
|
|
// Trampolines
|
|
case ISD::INIT_TRAMPOLINE: return "init_trampoline";
|
|
case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
|
|
|
|
case ISD::CONDCODE:
|
|
switch (cast<CondCodeSDNode>(this)->get()) {
|
|
default: llvm_unreachable("Unknown setcc condition!");
|
|
case ISD::SETOEQ: return "setoeq";
|
|
case ISD::SETOGT: return "setogt";
|
|
case ISD::SETOGE: return "setoge";
|
|
case ISD::SETOLT: return "setolt";
|
|
case ISD::SETOLE: return "setole";
|
|
case ISD::SETONE: return "setone";
|
|
|
|
case ISD::SETO: return "seto";
|
|
case ISD::SETUO: return "setuo";
|
|
case ISD::SETUEQ: return "setueq";
|
|
case ISD::SETUGT: return "setugt";
|
|
case ISD::SETUGE: return "setuge";
|
|
case ISD::SETULT: return "setult";
|
|
case ISD::SETULE: return "setule";
|
|
case ISD::SETUNE: return "setune";
|
|
|
|
case ISD::SETEQ: return "seteq";
|
|
case ISD::SETGT: return "setgt";
|
|
case ISD::SETGE: return "setge";
|
|
case ISD::SETLT: return "setlt";
|
|
case ISD::SETLE: return "setle";
|
|
case ISD::SETNE: return "setne";
|
|
|
|
case ISD::SETTRUE: return "settrue";
|
|
case ISD::SETTRUE2: return "settrue2";
|
|
case ISD::SETFALSE: return "setfalse";
|
|
case ISD::SETFALSE2: return "setfalse2";
|
|
}
|
|
case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
|
|
case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
|
|
case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
|
|
case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
|
|
case ISD::VECREDUCE_ADD: return "vecreduce_add";
|
|
case ISD::VECREDUCE_MUL: return "vecreduce_mul";
|
|
case ISD::VECREDUCE_AND: return "vecreduce_and";
|
|
case ISD::VECREDUCE_OR: return "vecreduce_or";
|
|
case ISD::VECREDUCE_XOR: return "vecreduce_xor";
|
|
case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
|
|
case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
|
|
case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
|
|
case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
|
|
case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
|
|
case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
|
|
case ISD::STACKMAP:
|
|
return "stackmap";
|
|
case ISD::PATCHPOINT:
|
|
return "patchpoint";
|
|
|
|
// Vector Predication
|
|
#define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
|
|
case ISD::SDID: \
|
|
return #NAME;
|
|
#include "llvm/IR/VPIntrinsics.def"
|
|
}
|
|
}
|
|
|
|
const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
|
|
switch (AM) {
|
|
default: return "";
|
|
case ISD::PRE_INC: return "<pre-inc>";
|
|
case ISD::PRE_DEC: return "<pre-dec>";
|
|
case ISD::POST_INC: return "<post-inc>";
|
|
case ISD::POST_DEC: return "<post-dec>";
|
|
}
|
|
}
|
|
|
|
static Printable PrintNodeId(const SDNode &Node) {
|
|
return Printable([&Node](raw_ostream &OS) {
|
|
#ifndef NDEBUG
|
|
OS << 't' << Node.PersistentId;
|
|
#else
|
|
OS << (const void*)&Node;
|
|
#endif
|
|
});
|
|
}
|
|
|
|
// Print the MMO with more information from the SelectionDAG.
|
|
static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
|
|
const MachineFunction *MF, const Module *M,
|
|
const MachineFrameInfo *MFI,
|
|
const TargetInstrInfo *TII, LLVMContext &Ctx) {
|
|
ModuleSlotTracker MST(M);
|
|
if (MF)
|
|
MST.incorporateFunction(MF->getFunction());
|
|
SmallVector<StringRef, 0> SSNs;
|
|
MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
|
|
}
|
|
|
|
static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
|
|
const SelectionDAG *G) {
|
|
if (G) {
|
|
const MachineFunction *MF = &G->getMachineFunction();
|
|
return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
|
|
&MF->getFrameInfo(),
|
|
G->getSubtarget().getInstrInfo(), *G->getContext());
|
|
}
|
|
|
|
LLVMContext Ctx;
|
|
return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
|
|
/*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
|
|
}
|
|
|
|
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
|
|
LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
|
|
|
|
LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const {
|
|
print(dbgs(), G);
|
|
dbgs() << '\n';
|
|
}
|
|
#endif
|
|
|
|
void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
|
|
for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
|
|
if (i) OS << ",";
|
|
if (getValueType(i) == MVT::Other)
|
|
OS << "ch";
|
|
else
|
|
OS << getValueType(i).getEVTString();
|
|
}
|
|
}
|
|
|
|
void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
|
|
if (getFlags().hasNoUnsignedWrap())
|
|
OS << " nuw";
|
|
|
|
if (getFlags().hasNoSignedWrap())
|
|
OS << " nsw";
|
|
|
|
if (getFlags().hasExact())
|
|
OS << " exact";
|
|
|
|
if (getFlags().hasNoNaNs())
|
|
OS << " nnan";
|
|
|
|
if (getFlags().hasNoInfs())
|
|
OS << " ninf";
|
|
|
|
if (getFlags().hasNoSignedZeros())
|
|
OS << " nsz";
|
|
|
|
if (getFlags().hasAllowReciprocal())
|
|
OS << " arcp";
|
|
|
|
if (getFlags().hasAllowContract())
|
|
OS << " contract";
|
|
|
|
if (getFlags().hasApproximateFuncs())
|
|
OS << " afn";
|
|
|
|
if (getFlags().hasAllowReassociation())
|
|
OS << " reassoc";
|
|
|
|
if (getFlags().hasNoFPExcept())
|
|
OS << " nofpexcept";
|
|
|
|
if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
|
|
if (!MN->memoperands_empty()) {
|
|
OS << "<";
|
|
OS << "Mem:";
|
|
for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
|
|
e = MN->memoperands_end(); i != e; ++i) {
|
|
printMemOperand(OS, **i, G);
|
|
if (std::next(i) != e)
|
|
OS << " ";
|
|
}
|
|
OS << ">";
|
|
}
|
|
} else if (const ShuffleVectorSDNode *SVN =
|
|
dyn_cast<ShuffleVectorSDNode>(this)) {
|
|
OS << "<";
|
|
for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
|
|
int Idx = SVN->getMaskElt(i);
|
|
if (i) OS << ",";
|
|
if (Idx < 0)
|
|
OS << "u";
|
|
else
|
|
OS << Idx;
|
|
}
|
|
OS << ">";
|
|
} else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
|
|
OS << '<' << CSDN->getAPIntValue() << '>';
|
|
} else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
|
|
if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
|
|
OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
|
|
else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
|
|
OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
|
|
else {
|
|
OS << "<APFloat(";
|
|
CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
|
|
OS << ")>";
|
|
}
|
|
} else if (const GlobalAddressSDNode *GADN =
|
|
dyn_cast<GlobalAddressSDNode>(this)) {
|
|
int64_t offset = GADN->getOffset();
|
|
OS << '<';
|
|
GADN->getGlobal()->printAsOperand(OS);
|
|
OS << '>';
|
|
if (offset > 0)
|
|
OS << " + " << offset;
|
|
else
|
|
OS << " " << offset;
|
|
if (unsigned int TF = GADN->getTargetFlags())
|
|
OS << " [TF=" << TF << ']';
|
|
} else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
|
|
OS << "<" << FIDN->getIndex() << ">";
|
|
} else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
|
|
OS << "<" << JTDN->getIndex() << ">";
|
|
if (unsigned int TF = JTDN->getTargetFlags())
|
|
OS << " [TF=" << TF << ']';
|
|
} else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
|
|
int offset = CP->getOffset();
|
|
if (CP->isMachineConstantPoolEntry())
|
|
OS << "<" << *CP->getMachineCPVal() << ">";
|
|
else
|
|
OS << "<" << *CP->getConstVal() << ">";
|
|
if (offset > 0)
|
|
OS << " + " << offset;
|
|
else
|
|
OS << " " << offset;
|
|
if (unsigned int TF = CP->getTargetFlags())
|
|
OS << " [TF=" << TF << ']';
|
|
} else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
|
|
OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
|
|
if (unsigned TF = TI->getTargetFlags())
|
|
OS << " [TF=" << TF << ']';
|
|
} else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
|
|
OS << "<";
|
|
const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
|
|
if (LBB)
|
|
OS << LBB->getName() << " ";
|
|
OS << (const void*)BBDN->getBasicBlock() << ">";
|
|
} else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
|
|
OS << ' ' << printReg(R->getReg(),
|
|
G ? G->getSubtarget().getRegisterInfo() : nullptr);
|
|
} else if (const ExternalSymbolSDNode *ES =
|
|
dyn_cast<ExternalSymbolSDNode>(this)) {
|
|
OS << "'" << ES->getSymbol() << "'";
|
|
if (unsigned int TF = ES->getTargetFlags())
|
|
OS << " [TF=" << TF << ']';
|
|
} else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
|
|
if (M->getValue())
|
|
OS << "<" << M->getValue() << ">";
|
|
else
|
|
OS << "<null>";
|
|
} else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
|
|
if (MD->getMD())
|
|
OS << "<" << MD->getMD() << ">";
|
|
else
|
|
OS << "<null>";
|
|
} else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
|
|
OS << ":" << N->getVT();
|
|
}
|
|
else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
|
|
OS << "<";
|
|
|
|
printMemOperand(OS, *LD->getMemOperand(), G);
|
|
|
|
bool doExt = true;
|
|
switch (LD->getExtensionType()) {
|
|
default: doExt = false; break;
|
|
case ISD::EXTLOAD: OS << ", anyext"; break;
|
|
case ISD::SEXTLOAD: OS << ", sext"; break;
|
|
case ISD::ZEXTLOAD: OS << ", zext"; break;
|
|
}
|
|
if (doExt)
|
|
OS << " from " << LD->getMemoryVT();
|
|
|
|
const char *AM = getIndexedModeName(LD->getAddressingMode());
|
|
if (*AM)
|
|
OS << ", " << AM;
|
|
|
|
OS << ">";
|
|
} else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
|
|
OS << "<";
|
|
printMemOperand(OS, *ST->getMemOperand(), G);
|
|
|
|
if (ST->isTruncatingStore())
|
|
OS << ", trunc to " << ST->getMemoryVT();
|
|
|
|
const char *AM = getIndexedModeName(ST->getAddressingMode());
|
|
if (*AM)
|
|
OS << ", " << AM;
|
|
|
|
OS << ">";
|
|
} else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) {
|
|
OS << "<";
|
|
|
|
printMemOperand(OS, *MLd->getMemOperand(), G);
|
|
|
|
bool doExt = true;
|
|
switch (MLd->getExtensionType()) {
|
|
default: doExt = false; break;
|
|
case ISD::EXTLOAD: OS << ", anyext"; break;
|
|
case ISD::SEXTLOAD: OS << ", sext"; break;
|
|
case ISD::ZEXTLOAD: OS << ", zext"; break;
|
|
}
|
|
if (doExt)
|
|
OS << " from " << MLd->getMemoryVT();
|
|
|
|
const char *AM = getIndexedModeName(MLd->getAddressingMode());
|
|
if (*AM)
|
|
OS << ", " << AM;
|
|
|
|
if (MLd->isExpandingLoad())
|
|
OS << ", expanding";
|
|
|
|
OS << ">";
|
|
} else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) {
|
|
OS << "<";
|
|
printMemOperand(OS, *MSt->getMemOperand(), G);
|
|
|
|
if (MSt->isTruncatingStore())
|
|
OS << ", trunc to " << MSt->getMemoryVT();
|
|
|
|
const char *AM = getIndexedModeName(MSt->getAddressingMode());
|
|
if (*AM)
|
|
OS << ", " << AM;
|
|
|
|
if (MSt->isCompressingStore())
|
|
OS << ", compressing";
|
|
|
|
OS << ">";
|
|
} else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) {
|
|
OS << "<";
|
|
printMemOperand(OS, *MGather->getMemOperand(), G);
|
|
|
|
bool doExt = true;
|
|
switch (MGather->getExtensionType()) {
|
|
default: doExt = false; break;
|
|
case ISD::EXTLOAD: OS << ", anyext"; break;
|
|
case ISD::SEXTLOAD: OS << ", sext"; break;
|
|
case ISD::ZEXTLOAD: OS << ", zext"; break;
|
|
}
|
|
if (doExt)
|
|
OS << " from " << MGather->getMemoryVT();
|
|
|
|
auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
|
|
auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
|
|
OS << ", " << Signed << " " << Scaled << " offset";
|
|
|
|
OS << ">";
|
|
} else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) {
|
|
OS << "<";
|
|
printMemOperand(OS, *MScatter->getMemOperand(), G);
|
|
|
|
if (MScatter->isTruncatingStore())
|
|
OS << ", trunc to " << MScatter->getMemoryVT();
|
|
|
|
auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
|
|
auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
|
|
OS << ", " << Signed << " " << Scaled << " offset";
|
|
|
|
OS << ">";
|
|
} else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) {
|
|
OS << "<";
|
|
printMemOperand(OS, *M->getMemOperand(), G);
|
|
OS << ">";
|
|
} else if (const BlockAddressSDNode *BA =
|
|
dyn_cast<BlockAddressSDNode>(this)) {
|
|
int64_t offset = BA->getOffset();
|
|
OS << "<";
|
|
BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
|
|
OS << ", ";
|
|
BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
|
|
OS << ">";
|
|
if (offset > 0)
|
|
OS << " + " << offset;
|
|
else
|
|
OS << " " << offset;
|
|
if (unsigned int TF = BA->getTargetFlags())
|
|
OS << " [TF=" << TF << ']';
|
|
} else if (const AddrSpaceCastSDNode *ASC =
|
|
dyn_cast<AddrSpaceCastSDNode>(this)) {
|
|
OS << '['
|
|
<< ASC->getSrcAddressSpace()
|
|
<< " -> "
|
|
<< ASC->getDestAddressSpace()
|
|
<< ']';
|
|
} else if (const LifetimeSDNode *LN = dyn_cast<LifetimeSDNode>(this)) {
|
|
if (LN->hasOffset())
|
|
OS << "<" << LN->getOffset() << " to " << LN->getOffset() + LN->getSize() << ">";
|
|
} else if (const auto *AA = dyn_cast<AssertAlignSDNode>(this)) {
|
|
OS << '<' << AA->getAlign().value() << '>';
|
|
}
|
|
|
|
if (VerboseDAGDumping) {
|
|
if (unsigned Order = getIROrder())
|
|
OS << " [ORD=" << Order << ']';
|
|
|
|
if (getNodeId() != -1)
|
|
OS << " [ID=" << getNodeId() << ']';
|
|
if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
|
|
OS << " # D:" << isDivergent();
|
|
|
|
if (G && !G->GetDbgValues(this).empty()) {
|
|
OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']';
|
|
for (SDDbgValue *Dbg : G->GetDbgValues(this))
|
|
if (!Dbg->isInvalidated())
|
|
Dbg->print(OS);
|
|
} else if (getHasDebugValue())
|
|
OS << " [NoOfDbgValues>0]";
|
|
|
|
if (const auto *MD = G ? G->getPCSections(this) : nullptr) {
|
|
OS << " [pcsections ";
|
|
MD->printAsOperand(OS, G->getMachineFunction().getFunction().getParent());
|
|
OS << ']';
|
|
}
|
|
}
|
|
}
|
|
|
|
LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const {
|
|
OS << " DbgVal(Order=" << getOrder() << ')';
|
|
if (isInvalidated())
|
|
OS << "(Invalidated)";
|
|
if (isEmitted())
|
|
OS << "(Emitted)";
|
|
OS << "(";
|
|
bool Comma = false;
|
|
for (const SDDbgOperand &Op : getLocationOps()) {
|
|
if (Comma)
|
|
OS << ", ";
|
|
switch (Op.getKind()) {
|
|
case SDDbgOperand::SDNODE:
|
|
if (Op.getSDNode())
|
|
OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo();
|
|
else
|
|
OS << "SDNODE";
|
|
break;
|
|
case SDDbgOperand::CONST:
|
|
OS << "CONST";
|
|
break;
|
|
case SDDbgOperand::FRAMEIX:
|
|
OS << "FRAMEIX=" << Op.getFrameIx();
|
|
break;
|
|
case SDDbgOperand::VREG:
|
|
OS << "VREG=" << Op.getVReg();
|
|
break;
|
|
}
|
|
Comma = true;
|
|
}
|
|
OS << ")";
|
|
if (isIndirect()) OS << "(Indirect)";
|
|
if (isVariadic())
|
|
OS << "(Variadic)";
|
|
OS << ":\"" << Var->getName() << '"';
|
|
#ifndef NDEBUG
|
|
if (Expr->getNumElements())
|
|
Expr->dump();
|
|
#endif
|
|
}
|
|
|
|
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
|
|
LLVM_DUMP_METHOD void SDDbgValue::dump() const {
|
|
if (isInvalidated())
|
|
return;
|
|
print(dbgs());
|
|
dbgs() << "\n";
|
|
}
|
|
#endif
|
|
|
|
/// Return true if this node is so simple that we should just print it inline
|
|
/// if it appears as an operand.
|
|
static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
|
|
// Avoid lots of cluttering when inline printing nodes with associated
|
|
// DbgValues in verbose mode.
|
|
if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty())
|
|
return false;
|
|
if (Node.getOpcode() == ISD::EntryToken)
|
|
return false;
|
|
return Node.getNumOperands() == 0;
|
|
}
|
|
|
|
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
|
|
static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
|
|
for (const SDValue &Op : N->op_values()) {
|
|
if (shouldPrintInline(*Op.getNode(), G))
|
|
continue;
|
|
if (Op.getNode()->hasOneUse())
|
|
DumpNodes(Op.getNode(), indent+2, G);
|
|
}
|
|
|
|
dbgs().indent(indent);
|
|
N->dump(G);
|
|
}
|
|
|
|
LLVM_DUMP_METHOD void SelectionDAG::dump() const {
|
|
dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
|
|
|
|
for (const SDNode &N : allnodes()) {
|
|
if (!N.hasOneUse() && &N != getRoot().getNode() &&
|
|
(!shouldPrintInline(N, this) || N.use_empty()))
|
|
DumpNodes(&N, 2, this);
|
|
}
|
|
|
|
if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
|
|
dbgs() << "\n";
|
|
|
|
if (VerboseDAGDumping) {
|
|
if (DbgBegin() != DbgEnd())
|
|
dbgs() << "SDDbgValues:\n";
|
|
for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
|
|
Dbg->dump();
|
|
if (ByvalParmDbgBegin() != ByvalParmDbgEnd())
|
|
dbgs() << "Byval SDDbgValues:\n";
|
|
for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
|
|
Dbg->dump();
|
|
}
|
|
dbgs() << "\n";
|
|
}
|
|
#endif
|
|
|
|
void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
|
|
OS << PrintNodeId(*this) << ": ";
|
|
print_types(OS, G);
|
|
OS << " = " << getOperationName(G);
|
|
print_details(OS, G);
|
|
}
|
|
|
|
static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
|
|
const SDValue Value) {
|
|
if (!Value.getNode()) {
|
|
OS << "<null>";
|
|
return false;
|
|
}
|
|
|
|
if (shouldPrintInline(*Value.getNode(), G)) {
|
|
OS << Value->getOperationName(G) << ':';
|
|
Value->print_types(OS, G);
|
|
Value->print_details(OS, G);
|
|
return true;
|
|
}
|
|
|
|
OS << PrintNodeId(*Value.getNode());
|
|
if (unsigned RN = Value.getResNo())
|
|
OS << ':' << RN;
|
|
return false;
|
|
}
|
|
|
|
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
|
|
using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
|
|
|
|
static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
|
|
const SelectionDAG *G, VisitedSDNodeSet &once) {
|
|
if (!once.insert(N).second) // If we've been here before, return now.
|
|
return;
|
|
|
|
// Dump the current SDNode, but don't end the line yet.
|
|
OS.indent(indent);
|
|
N->printr(OS, G);
|
|
|
|
// Having printed this SDNode, walk the children:
|
|
for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
|
|
if (i) OS << ",";
|
|
OS << " ";
|
|
|
|
const SDValue Op = N->getOperand(i);
|
|
bool printedInline = printOperand(OS, G, Op);
|
|
if (printedInline)
|
|
once.insert(Op.getNode());
|
|
}
|
|
|
|
OS << "\n";
|
|
|
|
// Dump children that have grandchildren on their own line(s).
|
|
for (const SDValue &Op : N->op_values())
|
|
DumpNodesr(OS, Op.getNode(), indent+2, G, once);
|
|
}
|
|
|
|
LLVM_DUMP_METHOD void SDNode::dumpr() const {
|
|
VisitedSDNodeSet once;
|
|
DumpNodesr(dbgs(), this, 0, nullptr, once);
|
|
}
|
|
|
|
LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const {
|
|
VisitedSDNodeSet once;
|
|
DumpNodesr(dbgs(), this, 0, G, once);
|
|
}
|
|
#endif
|
|
|
|
static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
|
|
const SelectionDAG *G, unsigned depth,
|
|
unsigned indent) {
|
|
if (depth == 0)
|
|
return;
|
|
|
|
OS.indent(indent);
|
|
|
|
N->print(OS, G);
|
|
|
|
for (const SDValue &Op : N->op_values()) {
|
|
// Don't follow chain operands.
|
|
if (Op.getValueType() == MVT::Other)
|
|
continue;
|
|
OS << '\n';
|
|
printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2);
|
|
}
|
|
}
|
|
|
|
void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
|
|
unsigned depth) const {
|
|
printrWithDepthHelper(OS, this, G, depth, 0);
|
|
}
|
|
|
|
void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
|
|
// Don't print impossibly deep things.
|
|
printrWithDepth(OS, G, 10);
|
|
}
|
|
|
|
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
|
|
LLVM_DUMP_METHOD
|
|
void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
|
|
printrWithDepth(dbgs(), G, depth);
|
|
}
|
|
|
|
LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const {
|
|
// Don't print impossibly deep things.
|
|
dumprWithDepth(G, 10);
|
|
}
|
|
#endif
|
|
|
|
void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
|
|
printr(OS, G);
|
|
// Under VerboseDAGDumping divergence will be printed always.
|
|
if (isDivergent() && !VerboseDAGDumping)
|
|
OS << " # D:1";
|
|
for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
|
|
if (i) OS << ", "; else OS << " ";
|
|
printOperand(OS, G, getOperand(i));
|
|
}
|
|
if (DebugLoc DL = getDebugLoc()) {
|
|
OS << ", ";
|
|
DL.print(OS);
|
|
}
|
|
}
|